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similar to most big data applications, the big data tendency also poses heavy impacts on service recommender systems. with the growing number of alternative services, effectively recommending services that users preferred has became an important research issue. service recommender systems have been exposed as valuable tools to help users deal with services overload and provide appropriate recommendations to them. in kasr, keywords are used to indicate users' preferences, and a user-based collaborative filtering algorithm is adopted to generate appropriate recommendations. more specifically, a keyword-candidate list and domain thesaurus are provided to help obtain users' preferences. the active user gives his/her preferences by selecting the keywords from the keyword-candidate list, and the preferences of the previous users can be extracted from their reviews for services according to the keyword-candidate list and domain thesaurus. the proposed system proposes methods it aims at presenting a personalized service recommendation list and recommending the most appropriate service(s) to the users. to improve the scalability and efficiency of kasr in “big data” environment, the proposed system proposes techniques that have been implemented it on a map reduce framework in hadoop platform. it improves the recommendation accuracy by considering the location of the user while recommend the service.
abstract while performance, power and area remain to be two major design goals, power consumption has become a critical concern in today’s vlsi system design. complex arithmetic operations are mainly used in dsp application. to develop a modified booth recoder for performing direct recoding of sum of two numbers in its modified booth (mb) form. it mainly focus on optimizing the design of the fused add multiply(fam) operator for increasing performance, decreases the critical path delay and reduces area and power consumption. in this project, the design of sum to modified booth recoding (sm-b) technique is implemented inorder to reduce the number of partial product. in this project explore three alternative schemes of the proposed s-mb approach using conventional and signed-bit full adders (fas) and half adders (has) as building blocks. low-cost finite impulse response (fir) designs are presented using the concept of faithfully rounded truncated multipliers. nonuniform coefficient quantization with proper filter order is proposed to minimize total area cost. multiple constant multiplication/accumulation in a direct fir structure is implemented using an improved version of truncated multipliers. comparisons with previous fir design approaches show that the proposed designs achieve the best area and power results. பரிவர்த்தனை