Hai cercato la traduzione di nominal core voltage (volts) da Inglese a Portoghese

nominal core voltage (volts)
voltagem nominal do núcleo (volts)

nominal core voltage (volts)
voltagem nominal do núcleo (volts)

nominal core voltage
voltagem central nominal

supply voltage... volts
tensão(ões) de alimentação... vóltios

connect the 12 v processor core voltage power supply cable to the 2x2 connector.
conecte o cabo de alimentação de 12 v do núcleo do processador ao conector 2x2.

ensure that the 2x2 or 2x4 power supply cable (depending on desktop board model) is plugged into the 12v processor core voltage connector located near the processor socket on the desktop board.
certifique-se de que o cabo de fonte de alimentação 2x2 ou 2x4 (dependendo do modelo da desktop board) esteja ligado ao conector de 12v de voltagem do núcleo do processador, próximo ao soquete da desktop board.

intel celeron processors in the fc-pga package require a different core voltage than intel celeron processors in the ppga package.
os processadores intel celeron no encapsulamento fc-pga requerem uma voltagem central diferente daquela nos processadores intel celeron no encapsulamento ppga.

the core voltage for fc-pga intel celeron processors is either 1.5 v, 1.65 v, or 1.7 v.
a voltagem central para processadores intel celeron fc-pga é 1,5 v, 1,65 v ou 1,7 v.

ensure that the 2x2 power supply cable with the 4-pin connector is plugged into the 12 v processor core voltage connector located near the processor socket on the desktop board.
verifique se o cabo 2x2 de fonte de alimentação com o conector de 4 pinos da fonte de alimentação está ligado ao conector de 12 v do processador, próximo ao soquete do processador.

ensure the power supply cable with either the 4-pin 2x2 connector, or the 8-pin 2x4 connector (depending on your desktop board), is plugged into the 12v processor core voltage connector located near the processor socket on the desktop board.
verifique se o cabo de alimentação de energia com o conector 2x2 de 4 pinos, ou o conector 2x4 de 8 pinos (dependendo da sua placa), está ligado ao conector de voltagem do núcleo do processador de 12v próximo ao soquete do processador na placa. veja as figuras abaixo:

p6-based core, now including streaming simd extensions (sse)** number of transistors 9.5 million** 512 kb bandwidth l2 external cache** 242-pin slot 1 secc2 (single edge contact cartridge 2) processor package** system bus clock rate 100 mhz, 133 mhz (b-models)** slot 1** family 6 model 7** variants*** 450, 500 mhz introduced february 26, 1999*** 550 mhz introduced may 17, 1999*** 600 mhz introduced august 2, 1999*** 533, 600 mhz introduced (133 mhz bus clock rate) september 27, 1999* coppermine – 0.18 μm process technology** introduced october 25, 1999** number of transistors 28.1 million** 256 kb advanced transfer l2 cache (integrated)** 242-pin slot-1 secc2 (single edge contact cartridge 2) processor package, 370-pin fc-pga (flip-chip pin grid array) package** system bus clock rate 100 mhz (e-models), 133 mhz (eb models)** slot 1, socket 370** family 6 model 8** variants*** 500 mhz (100 mhz bus clock rate)*** 533 mhz*** 550 mhz (100 mhz bus clock rate)*** 600 mhz*** 600 mhz (100 mhz bus clock rate)*** 650 mhz (100 mhz bus clock rate) introduced october 25, 1999*** 667 mhz introduced october 25, 1999*** 700 mhz (100 mhz bus clock rate) introduced october 25, 1999*** 733 mhz introduced october 25, 1999*** 750, 800 mhz (100 mhz bus clock rate) introduced december 20, 1999*** 850 mhz (100 mhz bus clock rate) introduced march 20, 2000*** 866 mhz introduced march 20, 2000*** 933 mhz introduced may 24, 2000*** 1000 mhz introduced march 8, 2000 (not widely available at time of release)*** 1100 mhz*** 1133 mhz (first version recalled, later re-released)*** 400, 450, 500 mhz (mobile) introduced october 25, 1999*** 600, 650 mhz (mobile) introduced january 18, 2000*** 700 mhz (mobile) introduced april 24, 2000*** 750 mhz (mobile) introduced june 19, 2000*** 800, 850 mhz (mobile) introduced september 25, 2000*** 900, 1000 mhz (mobile) introduced march 19, 2001* tualatin – 0.13 μm process technology** introduced july 2001** number of transistors 28.1 million** 32 kb l1 cache** 256 kb or 512 kb advanced transfer l2 cache (integrated)** 370-pin fc-pga2 (flip-chip pin grid array) package** 133 mhz system bus clock rate** socket 370** family 6 model 11** variants*** 1133 mhz (256 kb l2)*** 1133 mhz (512 kb l2)*** 1200 mhz*** 1266 mhz (512 kb l2)*** 1333 mhz*** 1400 mhz (512 kb l2)===pentium ii and iii xeon===* pii xeon** variants*** 400 mhz introduced june 29, 1998*** 450 mhz (512 kb l2 cache) introduced october 6, 1998*** 450 mhz (1 mb and 2 mb l2 cache) introduced january 5, 1999* piii xeon** introduced october 25, 1999** number of transistors: 9.5 million at 0.25 μm or 28 million at 0.18 μm** l2 cache is 256 kb, 1 mb, or 2 mb advanced transfer cache (integrated)** processor package style is single edge contact cartridge (s.e.c.c.2) or sc330** system bus clock rate 133 mhz (256 kb l2 cache) or 100 mhz (1–2 mb l2 cache)** system bus width 64 bits** addressable memory 64 gb** used in two-way servers and workstations (256 kb l2) or 4- and 8-way servers (1–2 mb l2)** family 6 model 10** variants*** 500 mhz (0.25 μm process) introduced march 17, 1999*** 550 mhz (0.25 μm process) introduced august 23, 1999*** 600 mhz (0.18 μm process, 256 kb l2 cache) introduced october 25, 1999*** 667 mhz (0.18 μm process, 256 kb l2 cache) introduced october 25, 1999*** 733 mhz (0.18 μm process, 256 kb l2 cache) introduced october 25, 1999*** 800 mhz (0.18 μm process, 256 kb l2 cache) introduced january 12, 2000*** 866 mhz (0.18 μm process, 256 kb l2 cache) introduced april 10, 2000*** 933 mhz (0.18 μm process, 256 kb l2 cache)*** 1000 mhz (0.18 μm process, 256 kb l2 cache) introduced august 22, 2000*** 700 mhz (0.18 μm process, 1–2 mb l2 cache) introduced may 22, 2000===celeron (pentium iii coppermine-based)===* coppermine-128, 0.18 μm process technology** introduced march, 2000** streaming simd extensions (sse)** socket 370, fc-pga processor package** number of transistors: 28.1 million** 66 mhz system bus clock rate, 100 mhz system bus clock rate from january 3, 2001** 32 kb l1 cache** 128 kb advanced transfer l2 cache** family 6 model 8** variants*** 533 mhz*** 566 mhz*** 600 mhz*** 633, 667, 700 mhz introduced june 26, 2000*** 733, 766 mhz introduced november 13, 2000*** 800 mhz introduced january 3, 2001*** 850 mhz introduced april 9, 2001*** 900 mhz introduced july 2, 2001*** 950, 1000, 1100 mhz introduced august 31, 2001*** 550 mhz (mobile)*** 600, 650 mhz (mobile) introduced june 19, 2000*** 700 mhz (mobile) introduced september 25, 2000*** 750 mhz (mobile) introduced march 19, 2001*** 800 mhz (mobile)*** 850 mhz (mobile) introduced july 2, 2001*** 600 mhz (lv mobile)*** 500 mhz (ulv mobile) introduced january 30, 2001*** 600 mhz (ulv mobile)xscale "(chronological entry - non-x86 architecture)"* introduced august 23, 2000* "see main entry"pentium 4 (not 4ee, 4e, 4f), itanium, p4-based xeon, itanium 2 "(chronological entries)"* introduced april 2000 – july 2002* "see main entries"===celeron (pentium iii tualatin-based)===* tualatin celeron – 0.13 μm process technology** 32 kb l1 cache** 256 kb advanced transfer l2 cache** 100 mhz system bus clock rate** socket 370** family 6 model 11** variants*** 1.0 ghz*** 1.1 ghz*** 1.2 ghz*** 1.3 ghz*** 1.4 ghz===pentium m===* banias 0.13 μm process technology** introduced march 2003** 64 kb l1 cache** 1 mb l2 cache (integrated)** based on pentium iii core, with sse2 simd instructions and deeper pipeline** number of transistors 77 million** micro-fcpga, micro-fcbga processor package** heart of the intel mobile "centrino" system** 400 mhz netburst-style system bus** family 6 model 9** variants*** 900 mhz (ultra low voltage)*** 1.0 ghz (ultra low voltage)*** 1.1 ghz (low voltage)*** 1.2 ghz (low voltage)*** 1.3 ghz*** 1.4 ghz*** 1.5 ghz*** 1.6 ghz*** 1.7 ghz* dothan 0.09 μm (90 nm) process technology** introduced may 2004** 2 mb l2 cache** 140 million transistors** revised data prefetch unit** 400 mhz netburst-style system bus** 21w tdp** family 6 model 13** variants*** 1.00 ghz (pentium m 723) (ultra low voltage, 5w tdp)*** 1.10 ghz (pentium m 733) (ultra low voltage, 5w tdp)*** 1.20 ghz (pentium m 753) (ultra low voltage, 5w tdp)*** 1.30 ghz (pentium m 718) (low voltage, 10w tdp)*** 1.40 ghz (pentium m 738) (low voltage, 10w tdp)*** 1.50 ghz (pentium m 758) (low voltage, 10w tdp)*** 1.60 ghz (pentium m 778) (low voltage, 10w tdp)*** 1.40 ghz (pentium m 710)*** 1.50 ghz (pentium m 715)*** 1.60 ghz (pentium m 725)*** 1.70 ghz (pentium m 735)*** 1.80 ghz (pentium m 745)*** 2.00 ghz (pentium m 755)*** 2.10 ghz (pentium m 765)* dothan 533 0.09 μm (90 nm) process technology** introduced q1 2005** same as dothan except with a 533 mhz netburst-style system bus and 27w tdp** variants*** 1.60 ghz (pentium m 730)*** 1.73 ghz (pentium m 740)*** 1.86 ghz (pentium m 750)*** 2.00 ghz (pentium m 760)*** 2.13 ghz (pentium m 770)*** 2.26 ghz (pentium m 780)* stealey 0.09 μm (90 nm) process technology** introduced q2 2007** 512 kb l2, 3w tdp** variants*** 600 mhz (a100)*** 800 mhz (a110)===celeron m===* banias-512 0.13 μm process technology** introduced march 2003** 64 kb l1 cache** 512 kb l2 cache (integrated)** sse2 simd instructions** no speedstep technology, is not part of the 'centrino' package** family 6 model 9** variants*** 310 – 1.20 ghz*** 320 – 1.30 ghz*** 330 – 1.40 ghz*** 340 – 1.50 ghz* dothan-1024 90 nm process technology** 64 kb l1 cache** 1 mb l2 cache (integrated)** sse2 simd instructions** no speedstep technology, is not part of the 'centrino' package** variants*** 350 – 1.30 ghz*** 350j – 1.30 ghz, with execute disable bit*** 360 – 1.40 ghz*** 360j – 1.40 ghz, with execute disable bit*** 370 – 1.50 ghz, with execute disable bit**** family 6, model 13, stepping 8*** 380 – 1.60 ghz, with execute disable bit*** 390 – 1.70 ghz, with execute disable bit* yonah-1024 65 nm process technology** 64 kb l1 cache** 1 mb l2 cache (integrated)** sse3 simd instructions, 533 mhz front-side bus, execute-disable bit** no speedstep technology, is not part of the 'centrino' package** variants*** 410 – 1.46 ghz*** 420 – 1.60 ghz,*** 423 – 1.06 ghz (ultra low voltage)*** 430 – 1.73 ghz*** 440 – 1.86 ghz*** 443 – 1.20 ghz (ultra low voltage)*** 450 – 2.00 ghz===intel core===* yonah 0.065 μm (65 nm) process technology** introduced january 2006** 533/667 mhz front side bus** 2 mb (shared on duo) l2 cache** sse3 simd instructions** 31w tdp (t versions)** family 6, model 14** variants:*** intel core duo t2700 2.33 ghz*** intel core duo t2600 2.16 ghz*** intel core duo t2500 2 ghz*** intel core duo t2450 2 ghz*** intel core duo t2400 1.83 ghz*** intel core duo t2300 1.66 ghz*** intel core duo t2050 1.6 ghz*** intel core duo t2300e 1.66 ghz*** intel core duo t2080 1.73 ghz*** intel core duo l2500 1.83 ghz (low voltage, 15w tdp)*** intel core duo l2400 1.66 ghz (low voltage, 15w tdp)*** intel core duo l2300 1.5 ghz (low voltage, 15w tdp)*** intel core duo u2500 1.2 ghz (ultra low voltage, 9w tdp)*** intel core solo t1350 1.86 ghz (533 fsb)*** intel core solo t1300 1.66 ghz*** intel core solo t1200 1.5 ghz===dual-core xeon lv===* sossaman 0.065 μm (65 nm) process technology** introduced march 2006** based on yonah core, with sse3 simd instructions** 667 mhz frontside bus** 2 mb shared l2 cache** variants*** 2.0 ghz==32-bit processors: netburst microarchitecture=====pentium 4===* 0.18 μm process technology (1.40 and 1.50 ghz)** introduced november 20, 2000** l2 cache was 256 kb advanced transfer cache (integrated)** processor package style was pga423, pga478** system bus clock rate 400 mhz** sse2 simd extensions** number of transistors 42 million** used in desktops and entry-level workstations* 0.18 μm process technology (1.7 ghz)** introduced april 23, 2001** see the 1.4 and 1.5 chips for details* 0.18 μm process technology (1.6 and 1.8 ghz)** introduced july 2, 2001** see 1.4 and 1.5 chips for details** core voltage is 1.15 volts in maximum performance mode; 1.05 volts in battery optimized mode** power <1 watt in battery optimized mode** used in full-size and then light mobile pcs* 0.18 μm process technology willamette (1.9 and 2.0 ghz)** introduced august 27, 2001** see 1.4 and 1.5 chips for details* family 15 model 1* pentium 4 (2 ghz, 2.20 ghz)** introduced january 7, 2002* pentium 4 (2.4 ghz)** introduced april 2, 2002* 0.13 μm process technology northwood a (1.7, 1.8, 1.9, 2, 2.2, 2.4, 2.5, 2.6, 2.8(oem),3.0(oem) ghz)** improved branch prediction and other microcodes tweaks** 512 kb integrated l2 cache** number of transistors 55 million** 400 mhz system bus.
p6-based core, now including streaming simd extensions (sse)** número de transistores 9.5 million** 512 kb ½ bandwidth l2 external cache** 242-pin slot 1 secc2 (single edge contact cartridge 2) processor package** system bus clock rate 100 mhz, 133 mhz (b-models)** slot 1** family 6 model 7** variants*** 450, 500 mhz introduzido em february 26, 1999*** 550 mhz introduzido em may 17, 1999*** 600 mhz introduzido em august 2, 1999*** 533, 600 mhz introduzido em (133 mhz bus clock rate) september 27, 1999* coppermine – 0.18 µm process technology** introduzido em october 25, 1999** número de transistores 28.1 million** 256 kb advanced transfer l2 cache (integrated)** 242-pin slot-1 secc2 (single edge contact cartridge 2) processor package, 370-pin fc-pga (flip-chip pin grid array) package** system bus clock rate 100 mhz (e-models), 133 mhz (eb models)** slot 1, socket 370** family 6 model 8** variants*** 500 mhz (100 mhz bus clock rate)*** 533 mhz*** 550 mhz (100 mhz bus clock rate)*** 600 mhz*** 600 mhz (100 mhz bus clock rate)*** 650 mhz (100 mhz bus clock rate) introduzido em october 25, 1999*** 667 mhz introduzido em october 25, 1999*** 700 mhz (100 mhz bus clock rate) introduzido em october 25, 1999*** 733 mhz introduzido em october 25, 1999*** 750, 800 mhz (100 mhz bus clock rate) introduzido em december 20, 1999*** 850 mhz (100 mhz bus clock rate) introduzido em march 20, 2000*** 866 mhz introduzido em march 20, 2000*** 933 mhz introduzido em may 24, 2000*** 1000 mhz introduzido em march 8, 2000 (not widely available at time of release)*** 1100 mhz*** 1133 mhz (first version recalled, later re-released)*** 400, 450, 500 mhz (mobile) introduzido em october 25, 1999*** 600, 650 mhz (mobile) introduzido em janeiro 18, 2000*** 700 mhz (mobile) introduzido em april 24, 2000*** 750 mhz (mobile) introduzido em june 19, 2000*** 800, 850 mhz (mobile) introduzido em september 25, 2000*** 900, 1000 mhz (mobile) introduzido em march 19, 2001* tualatin – 0.13 µm process technology** introduzido em july 2001** número de transistores 28.1 million** 32 kb l1 cache** 256 kb or 512 kb advanced transfer l2 cache (integrated)** 370-pin fc-pga2 (flip-chip pin grid array) package** 133 mhz system bus clock rate** socket 370** family 6 model 11** variants*** 1133 mhz (256 kb l2)*** 1133 mhz (512 kb l2)*** 1200 mhz*** 1266 mhz (512 kb l2)*** 1333 mhz*** 1400 mhz (512 kb l2)===pentium ii and iii xeon===* pii xeon** variants*** 400 mhz introduzido em june 29, 1998*** 450 mhz (512 kb l2 cache) introduzido em october 6, 1998*** 450 mhz (1 mb and 2 mb l2 cache) introduzido em janeiro 5, 1999* piii xeon** introduzido em october 25, 1999** number of transistores: 9.5 million at 0.25 µm or 28 million at 0.18 µm** l2 cache is 256 kb, 1 mb, or 2 mb advanced transfer cache (integrated)** processor package style is single edge contact cartridge (s.e.c.c.2) or sc330** system bus clock rate 133 mhz (256 kb l2 cache) or 100 mhz (1–2 mb l2 cache)** system bus width 64 bits** addressable memoria 64 gb** used in two-way servers and workstations (256 kb l2) or 4- and 8-way servers (1–2 mb l2)** family 6 model 10** variants*** 500 mhz (0.25 µm process) introduzido em march 17, 1999*** 550 mhz (0.25 µm process) introduzido em august 23, 1999*** 600 mhz (0.18 µm process, 256 kb l2 cache) introduzido em october 25, 1999*** 667 mhz (0.18 µm process, 256 kb l2 cache) introduzido em october 25, 1999*** 733 mhz (0.18 µm process, 256 kb l2 cache) introduzido em october 25, 1999*** 800 mhz (0.18 µm process, 256 kb l2 cache) introduzido em janeiro 12, 2000*** 866 mhz (0.18 µm process, 256 kb l2 cache) introduzido em april 10, 2000*** 933 mhz (0.18 µm process, 256 kb l2 cache)*** 1000 mhz (0.18 µm process, 256 kb l2 cache) introduzido em august 22, 2000*** 700 mhz (0.18 µm process, 1–2 mb l2 cache) introduzido em may 22, 2000===celeron (pentium iii coppermine-based)===* coppermine-128, 0.18 µm process technology** introduzido em march, 2000** streaming simd extensions (sse)** socket 370, fc-pga processor package** number of transistores: 28.1 million** 66 mhz system bus clock rate, 100 mhz system bus clock rate from janeiro 3, 2001** 32 kb l1 cache** 128 kb advanced transfer l2 cache** family 6 model 8** variants*** 533 mhz*** 566 mhz*** 600 mhz*** 633, 667, 700 mhz introduzido em june 26, 2000*** 733, 766 mhz introduzido em november 13, 2000*** 800 mhz introduzido em janeiro 3, 2001*** 850 mhz introduzido em april 9, 2001*** 900 mhz introduzido em july 2, 2001*** 950, 1000, 1100 mhz introduzido em august 31, 2001*** 550 mhz (mobile)*** 600, 650 mhz (mobile) introduzido em june 19, 2000*** 700 mhz (mobile) introduzido em september 25, 2000*** 750 mhz (mobile) introduzido em march 19, 2001*** 800 mhz (mobile)*** 850 mhz (mobile) introduzido em july 2, 2001*** 600 mhz (lv mobile)*** 500 mhz (ulv mobile) introduzido em janeiro 30, 2001*** 600 mhz (ulv mobile)xscale "(chronological entry - non-x86 architechture)"* introduzido em august 23, 2000* "see main entry"pentium 4 (not 4ee, 4e, 4f), itanium, p4-based xeon, itanium 2 "(chronological entries)"* introduzido em april 2000 – july 2002* "see main entries"===celeron (pentium iii tualatin-based)===* tualatin celeron – 0.13 µm process technology** 32 kb l1 cache** 256 kb advanced transfer l2 cache** 100 mhz system bus clock rate** socket 370** family 6 model 11** variants*** 1.0 ghz*** 1.1 ghz*** 1.2 ghz*** 1.3 ghz*** 1.4 ghz===pentium m===* banias 0.13 µm process technology** introduzido em march 2003** 64 kb l1 cache** 1 mb l2 cache (integrated)** based on pentium iii core, with sse2 simd instructions and deeper pipeline** número de transistores 77 million** micro-fcpga, micro-fcbga processor package** heart of the intel mobile "centrino" system** 400 mhz netburst-style system bus** family 6 model 9** variants*** 900 mhz (ultra low voltage)*** 1.0 ghz (ultra low voltage)*** 1.1 ghz (low voltage)*** 1.2 ghz (low voltage)*** 1.3 ghz*** 1.4 ghz*** 1.5 ghz*** 1.6 ghz*** 1.7 ghz* dothan 0.09 µm (90 nm) process technology** introduzido em may 2004** 2 mb l2 cache** 140 million transistores** revised data prefetch unit** 400 mhz netburst-style system bus** 21w tdp** family 6 model 13** variants*** 1.00 ghz (pentium m 723) (ultra low voltage, 5w tdp)*** 1.10 ghz (pentium m 733) (ultra low voltage, 5w tdp)*** 1.20 ghz (pentium m 753) (ultra low voltage, 5w tdp)*** 1.30 ghz (pentium m 718) (low voltage, 10w tdp)*** 1.40 ghz (pentium m 738) (low voltage, 10w tdp)*** 1.50 ghz (pentium m 758) (low voltage, 10w tdp)*** 1.60 ghz (pentium m 778) (low voltage, 10w tdp)*** 1.40 ghz (pentium m 710)*** 1.50 ghz (pentium m 715)*** 1.60 ghz (pentium m 725)*** 1.70 ghz (pentium m 735)*** 1.80 ghz (pentium m 745)*** 2.00 ghz (pentium m 755)*** 2.10 ghz (pentium m 765)* dothan 533 0.09 µm (90 nm) process technology** introduzido em q1 2005** same as dothan except with a 533 mhz netburst-style system bus and 27w tdp** variants*** 1.60 ghz (pentium m 730)*** 1.73 ghz (pentium m 740)*** 1.86 ghz (pentium m 750)*** 2.00 ghz (pentium m 760)*** 2.13 ghz (pentium m 770)*** 2.26 ghz (pentium m 780)* stealey 0.09 µm (90 nm) process technology** introduzido em q2 2007** 512 kb l2, 3w tdp** variants*** 600 mhz (a100)*** 800 mhz (a110)===celeron m===* banias-512 0.13 µm process technology** introduzido em march 2003** 64 kb l1 cache** 512 kb l2 cache (integrated)** sse2 simd instructions** no speedstep technology, is not part of the 'centrino' package** family 6 model 9** variants*** 310 – 1.20 ghz*** 320 – 1.30 ghz*** 330 – 1.40 ghz*** 340 – 1.50 ghz* dothan-1024 90 nm process technology** 64 kb l1 cache** 1 mb l2 cache (integrated)** sse2 simd instructions** no speedstep technology, is not part of the 'centrino' package** variants*** 350 – 1.30 ghz*** 350j – 1.30 ghz, with execute disable bit*** 360 – 1.40 ghz*** 360j – 1.40 ghz, with execute disable bit*** 370 – 1.50 ghz, with execute disable bit**** family 6, model 13, stepping 8*** 380 – 1.60 ghz, with execute disable bit*** 390 – 1.70 ghz, with execute disable bit* yonah-1024 65 nm process technology** 64 kb l1 cache** 1 mb l2 cache (integrated)** sse3 simd instructions, 533 mhz front-side bus, execute-disable bit** no speedstep technology, is not part of the 'centrino' package** variants*** 410 – 1.46 ghz*** 420 – 1.60 ghz,*** 423 – 1.06 ghz (ultra low voltage)*** 430 – 1.73 ghz*** 440 – 1.86 ghz*** 443 – 1.20 ghz (ultra low voltage)*** 450 – 2.00 ghz===intel core===* yonah 0.065 µm (65 nm) process technology** introduzido em janeiro 2006** 533/667 mhz front side bus** 2 mb (shared on duo) l2 cache** sse3 simd instructions** 31w tdp (t versions)** family 6, model 14** variants:*** intel core duo t2700 2.33 ghz*** intel core duo t2600 2.16 ghz*** intel core duo t2500 2 ghz*** intel core duo t2450 2 ghz*** intel core duo t2400 1.83 ghz*** intel core duo t2300 1.66 ghz*** intel core duo t2050 1.6 ghz*** intel core duo t2300e 1.66 ghz*** intel core duo t2080 1.73 ghz*** intel core duo l2500 1.83 ghz (low voltage, 15w tdp)*** intel core duo l2400 1.66 ghz (low voltage, 15w tdp)*** intel core duo l2300 1.5 ghz (low voltage, 15w tdp)*** intel core duo u2500 1.2 ghz (ultra low voltage, 9w tdp)*** intel core solo t1350 1.86 ghz (533 fsb)*** intel core solo t1300 1.66 ghz*** intel core solo t1200 1.5 ghz===dual-core xeon lv===* sossaman 0.065 µm (65 nm) process technology** introduzido em march 2006** based on yonah core, with sse3 simd instructions** 667 mhz frontside bus** 2 mb shared l2 cache** variants*** 2.0 ghz==32-bit processors: netburst microarchitecture=====pentium 4===* 0.18 µm process technology (1.40 and 1.50 ghz)** introduzido em november 20, 2000** l2 cache was 256 kb advanced transfer cache (integrated)** processor package style was pga423, pga478** system bus clock rate 400 mhz** sse2 simd extensions** número de transistores 42 million** used in desktops and entry-level workstations* 0.18 µm process technology (1.7 ghz)** introduzido em april 23, 2001** see the 1.4 and 1.5 chips for details* 0.18 µm process technology (1.6 and 1.8 ghz)** introduzido em july 2, 2001** see 1.4 and 1.5 chips for details** core voltage is 1.15 volts in maximum performance mode; 1.05 volts in battery optimized mode** power <1 watt in battery optimized mode** used in full-size and then light mobile pcs* 0.18 µm process technology willamette (1.9 and 2.0 ghz)** introduzido em august 27, 2001** see 1.4 and 1.5 chips for details* family 15 model 1* pentium 4 (2 ghz, 2.20 ghz)** introduzido em janeiro 7, 2002* pentium 4 (2.4 ghz)** introduzido em april 2, 2002* 0.13 µm process technology northwood a (1.7, 1.8, 1.9, 2, 2.2, 2.4, 2.5, 2.6, 2.8(oem),3.0(oem) ghz)** improved branch prediction and other microcodes tweaks** 512 kb integrated l2 cache** número de transistores 55 million** 400 mhz system bus.